Tuesday, June 21, 2011

IGNOU MCA SOLVED MCS-012 ASSIGNMENT

Course Code : MCS-012
Course Title : Computer Organisation and Assembly
Language Programming
Assignment Number : MCA(1)/012/Assign/2011
Maximum Marks : 100
Weightage : 25%
Last Dates for Submission : 15th April, 2011 (For January Session)
15th October, 2011 (For July Session)

BCA MCA Bsc B tech CS information technology final year project




There are four questions in this assignment, which carries 80 marks. Rest 20 marks are for viva voce. You may use illustrations and diagrams to enhance the explanations. Please go through the guidelines regarding assignments given in the Programme Guide for the format of presentation. Answer to each part of the question should be confined to about 300 words.

Question 1:

(a) Perform the following arithmetic operations using binary signed 2’s complement notation for integers. You may assume that the maximum size of integers is of 10 bits including the sign bit. (Please note that the numbers given here are in decimal notation) (3 Marks)

i) Add – 498 and 260
ii) Subtract 456 from – 56
ii) Add 256 and 255

Please indicate the overflow if it is occurs.

(b) Convert the hexadecimal number: FA BB C9 into binary, octal and decimal. (1 Mark)

(c) Convert the following string into equivalent ASCII code – “Copyright © 2001 - 2011”. Include ASCII code of spaces between words in the resultant ASCII. Are these codes same as that used in Unicode? (2 Marks)

(d) Design a logic circuit that accepts a four digit binary input and creates an odd parity bit, a sign check bit and a more than two zero value test bit. The odd parity bit is created for the four bit data. The sign bit is set to 1 if the left most bit of the data is 1. Zero value bit is set to 1 if three of the input bits are zero. Draw the truth table and use K-map to design the Boolean expressions for each of the output bits. Draw the resulting circuit diagram using AND – OR – NOT gates.
(5 Marks)







(e ) A sequential circuit has two D flip flops A and B, two inputs x and y and one output z. Flip flops input equations and the circuit output are as follows:
(5 Marks)

DA = x B’
DB = y A + x’ A’
z = A + B

(i) Draw the circuit diagram for the above.
(ii) Tabulate the state table for the flip flops.

(f) Design a floating point representation of 32 bits closer to IEEE 754 format except that the exponent of the representation should be of 4 bits only. You may assume that the mantissa is in normalised form; the exponent bias of 7; and one bit is used for the sign bit. Represent the number (89.125) 10 using this format .
(4 Marks)
Question 2:

(a) A RAM has a capacity of 64 K × 64.
(2 Marks)
(i) How many data input and data output lines does this RAM need to have?
(ii) How many address lines will be needed for this RAM?

(b) Consider a RAM of 256 words with a word size of 16 bits. Assume that this memory have a cache memory of 8 Blocks with block size of 32 bits. For the given memory and Cache in the statements as above, draw a diagram to show the address mapping of RAM and Cache, if direct memory to cache mapping scheme is used. (4 Marks)

(c) You want to read a file from a disk. Explain how the I/O will be performed if (4 Marks)

(i) Interrupt Driven Input/ Output Scheme is used.
(ii) Direct Memory Access is used.

(d) Find the average disk access time that reads or writes a 512 byte sector. Assume that the disk rotates at 12000 rpm; each track of the disk has 100 sectors and data transfer rate of the disk is 100 MB/second. (Please calculate data transfer time for the disk in addition to the seek time and latency time). Also find out what is meant by the controller overhead in the context of disk access time.
(2 Marks)

(e) What is the purpose of FAT? Explain. (2 Marks)
(Word limit for the answer is 200 words ONLY)








(f) Define each of the following term. Explain the main purpose / use / advantage of the term. (Word Limit for answer of each part is 50 words ONLY)
(6 Marks)
(i) DIMM
(ii) LCD monitors
(iii) Core of a processor
(iv) SATA
(v) RAID level 5
(vi) Zone Bit Recording (ZBR) in the context of disks


Question 3:

(a) Assume that a new programming language has been developed that have an extensive use of data and instruction arrays. Such a programming language requires efficient handling of arrays. This language supports call by reference as arrays are being passed by reference. The language does not support recursion. You have been assigned the task to design the addressing modes for a machine that supports this new programming language. List four addressing mode that must be supported by such a machine. Give justification of the selection of each of the addressing modes.
(4 Marks)

(b) Assume a hypothetical machine that has only PC, AC, MAR, IR, DR and Flag registers. (you may assume the roles of these registers same as that are defined in general for a von Neumann machine) The instruction of this machine can take only one direct operand. It has an instruction:

INC X; // increments the operand stored at location X. The result of increment is left in AC.

Show the steps for fetch and execute operations of the instructions using suitable micro-operations. Make and state suitable assumptions, if any.
(5 Marks)

(c) Assume that you have a machine as shown in section 3.2.2 of Block 3 having the micro-operations as given in Figure 10 on page 62 of Block 3. Consider that R1 and R2 both are 8 bit registers and contains 11110101 and 01011010 respectively. What will be the values of select inputs, carry-in input and result of operation if the following micro-operations are performed? (For each micro-operation you may assume the initial value of R1 and R2 as defined above)
(2 Marks)
1) Subtract R1 from R2
2) Increment R1
3) Shift Left R1
4) Add R1, R2 with an initial input carry bit as 1

(d) What are the different types of Control Units? Explain the hardwired control
unit with the hep of a diagram. (3 Marks)
(Word limit is 150 words)



(e) What is an instruction pipeline? What are the problems of an instruction pipeline?
How can you optimise the instruction pipeline in RISC processors? (3 Marks)
(Word limit 150 words)

(f) Why do you use large numbers of registers in RISC processors? Assume that a RISC machine has 64 registers out of which 8 are reserved for the Global variables. How will these registers be used for parameter passing for subroutine calls? Explain with the help of diagram

` (3 Marks)

Question 4:

(a) Write an 8086 assembly Language Program with proper comments to concatenate two strings that are available in the memory. The concatenated string is stored in memory location different from the two strings. You may assume that the end of a string character is ‘$’. Make suitable assumptions, if any. (8 Marks)

(b) Write a program in 8086 assembly language to convert a two digit number, which is stored in the memory as ASCII digits in two consecutive bytes, into an equivalent packed BCD number. The BCD number should be left in the AL register. For example, if the two memory locations contain characters ‘4’ and ‘5’ respectively, the program will output 0100 0101 in the AL register.
(6 Marks)

(c) Write a simple subroutine that accepts a parameter value. The subroutine checks if the passed parameter value is Zero (0). If the value is ZERO the subroutines output a string “Divide Overflow” and terminates the execution, other wise it allows the calling program to continue.
(6 Marks)

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